Non-volatile memory devices are configured to store information in an electrically insulated storage. A non-volatile memory device is typically classified as a stack gate memory device or a split gate memory device, or an electrically erasable programmable read-only memory (EEPROM).
A conventional split-gate memory device includes a memory gate having a floating gate and a control gate stacked thereon, and a select gate formed by filling a trench between the memory gates with polysilicon.
To form the select gate, a tunnel oxide layer is formed on a portion of the substrate, exposed between the memory gates, and spacers are provided on the sidewalls of the memory gates. Then, a polysilicon layer is formed on the tunnel oxide layer, and a select gate is formed through a planarization process and an ion implantation process against the polysilicon layer. That is, after forming a polysilicon layer, the select gate is additionally formed through a planarization process and an ion implantation process against the polysilicon layer. Then, a split gate memory element having a split gate structure may be manufactured.
In order to form the select gate as described above, a deposition process must be used for forming the polysilicon layer, and a planarization process and an ion implantation process must be used against the polysilicon layer, both of which processes must be performed independent from the memory gate. Therefore, there is a problem that the manufacturing process of the split gate memory device is complicated and requires unacceptably high levels of process time.